Texas Instruments
SN74LVC112APW
Flip Flops Dual Neg-Edge-Trig J-K Flip-Flop
Basic Information
View Datasheet ↗- Manufacturer
- Texas Instruments
- Product Category
- Flip Flops
- Series
- SN74LVC112A
- Package
- TSSOP-16
- Mounting Style
- SMD/SMT
- Packaging
- Tube
- RoHS
- Compliant (source record)
Technical Specifications
25 parameters- Number of Circuits
- 2
- Logic Family
- LVC
- Logic Type
- J-K Type Flip-Flop
- Polarity
- Inverting/Non-Inverting
- Input Type
- CMOS, TTL
- Output Type
- LVTTL
- Propagation Delay Time
- 7.1 ns
- High Level Output Current
- - 24 mA
- Low Level Output Current
- 24 mA
- Supply Voltage - Min
- 1.65 V
- Supply Voltage - Max
- 3.6 V
- Minimum Operating Temperature
- - 40 C
Show more parameters (13)
- Maximum Operating Temperature
- + 85 C
- Function
- JK Type
- Height
- 1.15 mm
- Length
- 5 mm
- Operating Temperature Range
- - 40 C to + 85 C
- Quiescent Current
- 10 uA
- Width
- 4.4 mm
- Number of Channels
- 2
- Number of Input Lines
- 3
- Number of Output Lines
- 2
- Operating Supply Voltage
- 1.65 V to 3.6 V
- Reset Type
- Set, Reset
- Unit Weight
- 0.002183 oz
Technical data, historical stock, and reference prices are for verification only. Confirm current supply, quotation, and lead time through inquiry. Similar parameters do not establish direct replacement.